1. Field
The present invention relates to integrated circuit technology, and more specifically to voltage source regulation.
2. Background
Portable electronic devices are becoming a mainstream in an increasing body of applications. Devices such as personal digital assistants (PDAs), mobile telephones, and portable computers are commonly used in the marketplace. The ever-growing demand from users of such devices for more applications and greater functionality from the services has pushed the envelope of design trends toward greater integration and more sophisticated processing on a single chip. In addition, as the demand for greater functionality in portable devices has increased, so to has the push for continued decreases in device form factor. These two demands have spurred the development of “system on a chip” designs that typically contain many processing functions on a single silicon chip.
The more functionally sophisticated the portable device becomes, the more energy the device will invariably consume and hence, the smaller the battery life. Long battery life, however, is a very important design and marketing parameter that the portable electronics industries continually strives to improve. Naturally, the desire for increased functionality and decreased size must be measured within the context of the practical limitations associated with existing battery technologies.
Designing more versatile portable devices is nevertheless becoming more feasible as the silicon-based technology scales down. For example, transistor-based technology is becoming progressively smaller. Smaller form factors for silicon devices permit increased circuit functionality within the same area as devices using larger form factors. With smaller feature size, more integration and greater amounts of circuitry with added functionality can be built within a given area on a silicon die. Further, smaller integrated circuits require and consume less energy.
Silicon based technologies have, as a practical matter, geometrical limits. Accordingly, more sophisticated integrated circuits require for optimal performance the design of energy reduction techniques, including integrated circuits used in a variety of portable devices. These techniques can be essential to the design of such devices. Currently, the most effective energy reduction method is to perform supply voltage regulation and to scale down the supply voltage to the chip where possible. Voltage regulation is a product of the industry's recognition that consumed energy has a quadratic dependence on voltage, and hence directly relates to the amount of power consumed by the battery or power source. In an illustration using complimentary metal-oxide-semiconductor (CMOS) technology, the active dynamic energy dissipation for CMOS transistors is given by the relationshipE=CavgVDD2where VDD is the supply voltage, Cavg represents the average switching capacitance, and E represents the dissipated energy resulting from a change of state of the transistor. From this relationship, it can be seen that reducing the supply voltage will correspondingly reduce the dissipated energy in the circuit.
Regardless of the silicon technology at issue, peak supply voltage is generally selected based on peak performance requirements of the integrated circuit. Frequently, peak performance may not be required by the processing unit(s) on the integrated circuit. Accordingly, supply voltage as a general matter can be scaled down when peak performance is not required. A classic example involves a cellular telephone in standby mode. Another illustration includes a portable data-receiving device whose processing circuitry recognizes that it can receive a given data stream at a much smaller data rate than the circuitry is capable of handling. In this instance, the device may not require a peak supply voltage to receive the data stream, and may activate some mechanism to reduce the voltage for this application. In many portable devices, a software interface is used to provide information about performance requirements. That information may be used, in turn, by a voltage regulator to reduce supply voltage based on the required speed at a given instance. The voltage regulator may be on-chip or off-chip, depending on the specific application.
A number of techniques for voltage regulation have been implemented in the industry or proposed in the literature. One such class of techniques include Dynamic Voltage Scaling (DVS). DVS is a voltage regulation feedback system that is used to dynamically control supply voltage according to performance requirements. By exploiting the variations associated with different computational requirements for a device at different times, the average energy of the device can be reduced while maintaining the same data throughput. When supply voltage and operating frequency are controlled dynamically according to a required computational load reported by a performance management circuit, the average energy of a transistor-based silicon device can be reduced significantly. From this reduction in energy, it logically follows that battery lifetime can be extended.
Existing DVS techniques are not without their significant drawbacks. For example, situations exist where the microprocessor on a chip suddenly demands high performance. This performance requirement may exceed the time response capabilities of the DVS system in place. In such situations, the supply voltage must be raised to the maximum power supply to guarantee peak performance under all adverse conditions and across all variables. Only after this rapid raise in supply voltage, and assuming relative stability in the ensuing operating frequency requirement, can the voltage regulator attempt to lower the voltage, if possible, to an optimum value which minimizes power consumption while guaranteeing a sufficient voltage swing for peak processor performance.
Other DVS techniques, including closed-loop voltage regulation systems, may rely on considerable trial-and-error testing prior to implementing a reliable model. Such trial-and-error techniques can be costly in terms of manpower, equipment, and time to market. In addition, such techniques may not be able to accurately track critical paths used in the processor for the purpose of estimating processor frequency requirements.
Still other DVS techniques may not be sensitive to all of the variations that impact device performance. For instance, the speed of an integrated circuit device depends on voltage, temperature, memory/logic structure, transistor threshold voltage, and process variations. DVS techniques that are not designed to account for each of these variations may not be efficient, and in some cases, may be inaccurate or may result in degraded or interrupted performance. When sudden performance increases are required, certain DVS techniques in this latter category must often raise supply voltage to a peak value that is the minimum value necessary to sustain performance requirements across all of these variables. However, this voltage may be unnecessarily high in light of one or more unaccounted-for variables, often resulting in an unnecessary taxation of battery power. If, as an illustration, a DVS regulator is not designed to recognize that a particular integrated circuit is operating at a fast process split, a larger than necessary supply voltage will likely be imposed on the system in the event of a sudden performance increase requirement. This unnecessary voltage margin can be unacceptable in the context of mobile applications, where preservation of battery power is particularly important.
A need exists in the art for a more robust and efficient dynamic voltage scaling architecture especially suitable for highly integrated mobile devices.